TSMC Reportedly Weighs Up to 20% CoWoS Packaging Price Hike

TSMC is reportedly considering raising prices for its CoWoS (Chip on Wafer on Substrate) advanced packaging technology by up to 20%. The claim, attributed to supply chain sources and local press, points to pressure created by surging AI demand and lengthening delivery times for chip manufacturing equipment. TSMC has not yet confirmed the report.

If such an increase goes ahead, the impact would be significant, because CoWoS is already regarded as one of the tightest bottlenecks in the AI supply chain.

Why CoWoS matters so much

CoWoS combines logic chips and high-bandwidth memory (HBM) stacks within a single package. It is the method that lets AI accelerators reach the data bandwidth their heavy workloads require. As designers try to fit more compute and memory into each new generation, these packages become harder to build.

Nvidia's Blackwell architecture already pairs two large GPU dies with eight HBM3E stacks. The upcoming Rubin and Rubin Ultra are expected to push integration further, increasing the strain on packaging capacity and the supply chain behind it. The competition is not limited to GPUs, either: server processors and custom-designed ASICs also need advanced packaging, adding load to an already crowded supply chain.

Testing times and equipment delays

Testing is another chokepoint. Blackwell reportedly takes three to four times longer to test than Nvidia's previous generation, Hopper, and the figure for Rubin is said to reach as much as seven times. Longer test cycles keep equipment occupied for longer, which makes it harder to raise output as demand grows.

Tool procurement has slowed too. Equipment lead times are reported to have stretched from three to six months to as long as eight months. As a result, TSMC is said to be placing this year's equipment orders at current prices, without negotiating discounts or extra features. That departs from the company's habit of using its purchasing power to secure better terms; getting tools on time appears to have taken priority over getting them cheaply.

A report published in September painted a similar picture: TSMC's projected semiconductor equipment needs had nearly doubled within six months. Cliff Hou, the company's deputy co-COO, said that by July the expected equipment requirement had reached 1.9 times the original estimate, adding that in 30 years he had never seen demand grow this much or change this often.

Widening the supply chain, and other price rises

TSMC is also trying to diversify its packaging supply chain. Earlier this month, GlobalFoundries agreed to produce silicon interposers in the US for TSMC's CoWoS process under a five-year contract worth $2 billion. Production is expected to ramp up in the first half of 2028. But the interposer is only one part of the packaging flow, so the deal alone will not eliminate the shortage.

Cost increases may not stop at packaging. TSMC is reportedly weighing broader price rises for 2027, with wafer prices on advanced process nodes expected to climb 5% to 10%. Customers using 2 nm and 3 nm class nodes could face the steepest increases, while those requesting capacity beyond their original allocations may have to pay extra premiums, with some costs rising by as much as 25%.

Industry estimates put TSMC's monthly capacity at more than 106,000 wafers in 2026, with a 2027 target of 227,000 wafers. If both the packaging and wafer increases materialize, AI hardware looks likely to become more expensive still, and some of that rise will inevitably be passed down the chain.